Design and Implementation of Low-Power Single-Phase Clock Multiband Flexible Divider
نویسنده
چکیده
In this paper, a low-power single-phase clock multiband flexible divider for Bluetooth, Zig-bee, and IEEE 802.15.4 and 802.11 a/b/g WLAN frequency synthesizers is proposed based on pulse-swallow topology and is implemented using a 0.18-m CMOS technology. The multiband divider consists of a proposed wideband multi-modulus 32/33/47/48 pre-scalar and an improved bit-cell for swallow (S) counter and can divide the frequencies in the three bands of 2.4–2.484 GHz, 5.15–5.35 GHz, and 5.725–5.825 GHz with a resolution selectable from 1 to 25 MHz The proposed multiband flexible divider is silicon verified and consumes power of 0.96 and 2.2 mW in 2.4and 5-GHz bands, respectively, when operated at 1.8-V power supply.
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